2 research outputs found
Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction
Similar to digital circuits, analog and mixed-signal (AMS) circuits are also susceptible to supply-chain attacks such as piracy, overproduction, and Trojan insertion. However, unlike digital circuits,
supply-chain security of AMS circuits is less explored. In this work,
we propose to perform “logic locking” on digital section of the AMS
circuits. The idea is to make the analog design intentionally suffer
from the effects of process variations, which impede the operation of the circuit. Only on applying the correct key, the effect of process
variations are mitigated, and the analog circuit performs as desired.
We provide the theoretical guarantees of the security of the circuit,
and along with simulation results for the band-pass filter, low-noise
amplifier, and low-dropout regulator, we also show experimental
results of our technique on a band-pass filter
Securing Analog Intellectual Properties and Cloud FPGAs
There are a plethora of hardware security threats depending on the source from which they
arise. One of the sources of threats is the globalization of the integrated circuits (IC) supply-chain. With the outsourcing of IC fabrication, the semiconductor industry faces several challenging security threats. These threats include but are not limited to intellectual property (IP) piracy, reverse engineering, and overproduction. Another source of threat is resource sharing, where more than one user accesses a single resource. If the cloud field-programmable gate array (FPGA) servers allow more than one user to access a single FPGA, data leakage can occur between the users. Though there are various other sources for hardware security threats, in this dissertation, we focus on the threats based on the sources mentioned above.
In the first work, we propose a defense technique to secure analog and mixed-signal (AMS)
circuits against overproduction. We perform “logic-locking” on the digital section of the AMS
circuits. The idea is to make the analog design intentionally suffer from the effect of process
variations that impedes the operation of the circuit. Our results show that, only on applying the
correct key, the analog circuit performs as desired.
For the second work, we propose an attack technique to evaluate the resilience offered by the
existing defenses that secure analog-only and AMS circuits with the help of satisfiability modulo
theories (SMT) and Boolean satisfiability (SAT). We demonstrate our attack on five analog locking techniques and three AMS locking techniques. The attack is demonstrated on commonly used circuits, such as bandpass filter (BPF), LC oscillator, triangular waveform generator (TWG), and quadrature oscillator.
For the third and final work, we investigate the impact of primitive-level placement on power-side channel (PSC) attack on cloud FPGAs and the defenses that thwart them. Also, the impact of additional logic that resides along with the advanced encryption standard (AES) on the correlation power analysis (CPA) attack is studied. Our results showcase that the AES along with filters and/or processors, is sufficient to provide better security compared to the existing defenses